Improved branch prediction and hardware data pre-fetch: The purpose of the branch prediction logic is to minimize situations when the processor has to flush its pipeline because it has begun to execute a wrong program branch. The branch prediction logic of the Pentium M has considerably improved since the Pentium III. In fact, the Pentium M predicts branches much like the Pentium 4 does.

The branch prediction unit of the Pentium M is similar to the same unit of Prescott-core processors. It has additional logic for identifying loops and for predicting indirect branches. That is, the Pentium M considerably differs from its ancestor and is even more advanced than pre-Prescott Pentium 4 models in terms of branch prediction. Of course, it was impossible for the Pentium M to go far from the classical statistical branch prediction based on the branch history table. But Intel?s engineers managed to increase the prediction accuracy of the Pentium M by 20% over the Pentium III by adding a few innovations.

The first innovation is the loop recognition logic. With the ordinary statistical approach, branch predictions for end-loop conditions are always wrong. Of course, it is possible to enlarge the buffers that store the information about branches, but this would bring about long latencies necessary for all this info to be analyzed. So, the Pentium M uses a slightly different approach: independent logic identifies loops in the code and gathers information about the number of iterations made in the given loop. This greatly improves the prediction accuracy for end-loop conditions.

The second improvement is the indirect branch prediction logic. An indirect branch is a branch the branching address of which is not known at the time of compilation but is determined by the status of a particular register during execution of the program. The standard statistical prediction with a branch history table and a branch address table yields rather poor results here: no more than 75% of right predictions. That?s why the developers added a new table into the Pentium M which stores information about branching addresses of this type.

As the result of these two improvements, the execution units remain idle less often because of pipeline refills. Thanks to them, the performance of the Pentium M grew by about 7% above the performance of the Pentium III working at the same frequency.

Along with the improved branch prediction unit, the Pentium M features new logic for hardware data pre-fetch from memory to cache. The new algorithm employed in the Pentium M is more efficient than its analog from the Pentium III and is similar to the hardware data pre-fetch algorithm of Prescott-core Pentium 4 processors.