Micro-ops fusion: The Pentium M, like the Pentium III or Pentium 4, is a RISC processor. It means its execution units deal with internal, simplified commands rather than with complex x86 instructions. It is easier and faster to operate with RISC instructions than with x86 commands that often have three or more operands. As a result, x86 commands can be replaced with one, two or even three micro operations after they pass through the decoder. For example, the commands for storing data in memory or processing data in memory are decoded into two instructions each. In the first case, this pair consists of commands to calculate the address and to store the data in the buffer. In the second case, we have a command to read data from memory and a command that operates on these data. Considering that all modern processors are capable of out-of-order execution of micro operations, the commands that are part of a single x86 instruction may come to the execution pipeline independently. If one such micro operation can be executed aside of the other one, there’s no problem at all. But in the opposite case, if it is necessary to know the result of one instruction to execute another, the pipeline may come to a standstill. Such standstills aren’t actually dramatic for NetBurst processors where there are rather many execution units, but they may affect the performance of a CPU like the Pentium M very negatively. Moreover, such standstills involve the processor wasting power which is unacceptable for a mobile CPU. That’s why Pentium M processors have micro-ops fusion technology which is intended to prevent the execution units from staying idle.

The point of this technology is very simple. For a certain subset of x86 instructions (Intel doesn’t explicitly name them) the decoder binds together the micro operations that result from decoding a complex x86 command. It’s clear that the subset consists of x86 commands that split into independent micro-ops. Although micro-ops fusion technology reduced the number of instructions executed out of order by about 10%, the performance did not degenerate. On the contrary, this technology increases the performance of the processor by about 5% with integer data and by about 9% with floating-point data.

So, these micro-ops sequences are bound together by the fusion technology for execution in a particular order, and they are regarded as a single command until actually executed by the CPU. This approach helps to reduce the power consumption necessary to execute complex x86 instructions.

Dedicated stack manager: Another innovation implemented in Pentium M processors is the so-called stack manager which should reduce the load on the processor’s computation units when executing stack-related x86 instructions. The point of the Pentium M’s stack manager is in identifying instructions like PUSH, POP, CALL and RET that come to the processor’s decoder and in pre-processing them before they even arrive to the execution units. The dedicated stack manager works with the stack pointer register which is not changed in the Pentium M by the integer execution units like in processors of other architectures. Since software uses the stack quite actively, particularly when calling subprograms, the introduction of the dedicated stack manager reduces the load on the CPU’s execution units. This ultimately leads to higher performance and lower heat dissipation of the processor. Particularly, the dedicated stack manager reduces the number of instructions processed by the integer execution units by about 5%.

Processor bus: Although the Pentium M architecture is based on the Pentium III architecture, the Pentium M uses a completely different bus. The system bus in the P6 architecture had a peak bandwidth of 1GB/s which is too low by today’s standards. It was considered inappropriate to use this bus in modern processors, and Intel’s engineers decided to use the Quad Pumped Bus for the Pentium M. This is the bus employed in Pentium 4 family processors. In fact, the Quad Pumped Bus is the only point of similarity between the Pentium 4 and Pentium M. Indeed, even this bus is slightly different in the Pentium M, lacking some features. For example, the frequency of the system bus of the Pentium 4 processor has reached 800MHz by now, while the bus of the Pentium M operates at 533MHz today. Then, the Pentium M’s system bus only supports 32-bit addressing. That is, it can address no more than 4 gigabytes of memory. And lastly, the Pentium M’s bus doesn’t support multi-processor configurations. These differences are of little importance, however, and the Pentium 4 and Pentium M are compatible on the interface level. So, the processor for mobile computers can theoretically work with desktops-oriented chipsets.