Intel Corp. will remove hardware x86 instructions translation technology from the future Itanium 2 processors, including dual-core Montecito chip scheduled for mid-2006 volume production. Instead of hardware emulation, Intel will demand programs to utilize ?IA32 Execution Layer ?software emulation of what is generally known as the Intel Architecture 32 (IA32).

The move comes after Intel had rescheduled the beginning of volume production of the chip and cut-down its technical specifications in late October, 2005 (click here for details). While generally the absence of the hardware emulation of the x86 does not impact current Itanium 2 customers in the high-end server market, the intention to remove of the hardware translation technology that allows x86 code to be executed on Itanium 2 processors means that it neither was successful, nor is to be demanded in future. Though, Intel remains optimistic about the x86 execution on Intel Itanium-based systems.

?IA-32 EL provides much better performance and flexibility for 32-bit applications on Itanium. With Montecito, we took back the silicon area that was being used up by the x86 hardware support,?Intel Corp. spokeswoman Erica Fields told CNET News.com web-site.

IA32 EL is a software layer that is currently shipping with Itanium architecture-based operating systems and will convert IA-32 instructions into Itanium processor instructions via dynamic translation.

According to the manual for the dual-core Intel Itanium 2 processors, the IA32 execution on the Montecito processor is enabled with the IA32 Execution Layer (IA32 EL) and PAL-based IA32 execution. IA32 EL is operating system (OS) -based and is only available after an OS has booted. PAL-based IA32 execution is available after PAL_COPY_PAL is called and provides IA32 execution support before the OS has booted. All OSes running on Montecito have a requirement to have IA32 EL installed. There is no support for PAL-based IA32 execution in an OS environment.

Originally the Itanium 2 processor was supposed to execute both x86 and PA-RISC code maintaining compatibility with software for platforms developed for Intel's and HP's processors. But in reality the chip did not sustain compatibility with the PA-RISC and now it abandons hardware IA32-to-IA64 translation support for the Itanium chips, something which completely cuts the processor's ability to compete in the desktops where conventional x86 architecture is going to be used for long, whereas the IA32 EL does not provide sufficient performance. Still, there is a slight chance that the IA32 EL will improve its efficiency dramatically someday.