Intel Developer Forum Spring 2005: Day 2 Coverage :
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Intel Developer Forum Spring 2005: Day 2 Coverage

Date: 2005-3-4

[Abstract]
   Today we will be talking a lot about the desktop and mobile solutions from Intel. But before we start I would like to stress that the entire forum, all the sessions and classes were con...

[Content] PCDigitalMobileGame


Desktop Product Roadmap

Pentium D

Intel Developer Forum Spring 2005: Day 2 Coverage

This is a dual core solution. Each core has its own 1MB L2 cache and its own independent bus interface. Both cores have connections to the pins on front side bus. That gives us the total number of loads: three for the system bus, two for the processor, one for the chipset. Note that the bus runs at 800MHz.

The CPU supports 64-bit technology, Execute Disable Bit and is compatible with the LGA775 socket.

This processor will be available in Q2 2005.

Note that the multi-core version of Intel Pentium processor Extreme Edition will support HT technology, so you will have the ability to support 4 threads simultaneously.

Presler

Intel Developer Forum Spring 2005: Day 2 Coverage

The next generation processor will be manufactured with 65nm process and will have two separate cores. However, there are a few other changes. This Presler processor will have 2MB L2 cache, which is double the size of the cache compared with the Pentium D processor. It will be designed for the same socket, LGA775.

It will be available in the first half of 2006.

Cedar Mill

Intel Developer Forum Spring 2005: Day 2 Coverage

Intel will also have a single core version of Presler processor, manufactured with the same 65nm technology. It will support HT technology, 64-bit, Execute Disable Bit and will be designed for the LGA775 socket.

It will also be available in first half of next year.




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